VHF SAME Receiver Design
Budget / Salary$250–750
TypeFreelance project
LocationRemote
Posted1 hour ago
# TECHNICAL REQUIREMENTS
## VHF SAME Receiver and AFSK/FSK Demodulator
**Document:** RT-RF-SAME-001
**Revision:** 1.1
**Application:** EAS-SAME/SASMEX Signal Receiver
**Target Frequency:** 162.425 MHz
**Operating Band:** 162.400–162.550 MHz
---
## 1. OBJECTIVE
Design and develop an electronic module capable of receiving the VHF signal at **162.425 MHz**, demodulating the NFM transmission, recovering the baseband signal, and demodulating the **AFSK/FSK data used by SAME (Specific Area Message Encoding)**.
The module shall cover the complete signal chain:
**Antenna/RF Input → RF Filtering → VHF Receiver → NFM Demodulation → Baseband Conditioning → AFSK/FSK Demodulation → Digital DATA_OUT**
The final output shall be ready for connection to an external microcontroller that will implement the SAME protocol decoder.
Implementation of the complete SAME message parser and earthquake alert logic is outside the scope of this development.
---
## 2. RF REQUIREMENTS
### 2.1 Frequency
Primary operating frequency:
**162.425 MHz**
The design should preferably support software/configuration-based tuning across:
**162.400–162.550 MHz**
without PCB or component changes.
### 2.2 RF Input
* Nominal impedance: **50 Ω**
* External antenna connection: preferably **SMA**
* Antenna suitable for approximately 162 MHz
* RF layout shall follow appropriate controlled-impedance and grounding practices.
### 2.3 Modulation
The receiver shall support the **Narrowband FM (NFM)** transmission carrying the SAME AFSK data.
The NFM demodulator shall provide a baseband signal with sufficient fidelity for subsequent digital data recovery.
### 2.4 Sensitivity
Required design target:
**≤ –110 dBm**
Preferred target:
**≤ –115 dBm**
The final sensitivity shall be experimentally characterized based on successful digital data recovery, not audible reception only.
### 2.5 Selectivity and Stability
The receiver shall provide sufficient selectivity to reject adjacent/out-of-channel VHF signals.
A crystal, TCXO, PLL, or equivalent stable frequency reference shall be used to maintain reliable tuning during continuous operation.
The designer shall specify the achieved frequency accuracy and stability.
---
## 3. RECEIVER ARCHITECTURE
The designer may select an appropriate architecture, including:
* integrated VHF receiver;
* superheterodyne;
* low-IF;
* direct conversion;
* RF transceiver configured for receive operation;
* equivalent solution.
The selected solution shall prioritize:
* sensitivity;
* selectivity;
* frequency stability;
* component availability;
* manufacturing repeatability;
* long-term availability.
The receiver should preferably provide **RSSI (Received Signal Strength Indicator)** through an analog or digital interface.
---
## 4. BASEBAND REQUIREMENTS
The NFM demodulated output shall preserve the AFSK frequencies used by SAME:
**MARK: 2083.3 Hz**
**SPACE: 1562.5 Hz**
**Nominal data rate: 520.83 bit/s**
The baseband signal shall not be excessively modified by audio processing, filtering, deemphasis, AGC, or other functions that could affect reliable data recovery.
A test point identified as **TP_BASEBAND** shall be provided.
---
## 5. AFSK SIGNAL CONDITIONING
The baseband signal shall be filtered and conditioned for reliable discrimination of the MARK and SPACE frequencies.
As a design reference, the signal-processing chain should preserve approximately:
**1.2 kHz to 2.5 kHz**
with minimal distortion at 1562.5 Hz and 2083.3 Hz.
Filtering may be implemented using:
* analog active/passive filters;
* digital filters;
* DSP;
* or a combination of these methods.
The selected implementation shall be documented.
---
## 6. AFSK/FSK DEMODULATION
The module shall reliably distinguish:
**MARK = 2083.3 Hz**
and
**SPACE = 1562.5 Hz**
at approximately:
**520.83 bit/s**
The demodulation method may use a PLL, frequency discriminator, Goertzel algorithm, DSP, MCU, dedicated modem IC, FPGA, or another technically justified method.
The demodulator shall provide a digital output representing the recovered MARK/SPACE data.
---
## 7. DIGITAL OUTPUT AND MCU INTERFACE
The primary output shall be:
**DATA_OUT**
Preferred electrical level:
**3.3 V logic**
The output shall preserve sufficient timing and data integrity for an external MCU to subsequently perform:
**DATA_OUT → Bit Recovery → Byte Recovery → SAME Message Decoding**
The receiver shall therefore be ready for future detection of SAME messages such as:
`ZCZC-ORG-EEE-PSSCCC+TTTT-JJJHHMM-LLLLLLLL-`
The module should also provide, when supported:
* RSSI
* CARRIER_DETECT
* ENABLE
* RESET
* SPI/I²C/UART for receiver configuration
The designer shall document all interface voltage levels, timing, signal direction, and configuration requirements.
---
## 8. CARRIER DETECTION AND FALSE ACTIVATION
A **CARRIER_DETECT** output is preferred.
Carrier detection, RSSI, or the presence of audio shall **not** be considered a valid alert.
The complete future validation chain shall be:
**RF Carrier → Valid AFSK → Valid Data → Valid SAME Message → Valid Event → Alert**
The current project scope ends at reliable AFSK/FSK digital data recovery.
---
## 9. POWER SUPPLY
Preferred module input:
**5 VDC**
Local regulators may generate 3.3 V, 1.8 V, or other required voltages.
The designer shall specify:
* nominal current consumption;
* maximum current consumption;
* operating voltage tolerance.
Power filtering and decoupling shall prevent digital or switching noise from degrading RF sensitivity.
The receiver shall be suitable for continuous **24/7 operation**.
---
## 10. PCB REQUIREMENTS
The PCB shall follow appropriate RF design practices, including:
* solid/continuous ground plane;
* RF and digital section separation;
* controlled RF routing where required;
* proper IC decoupling;
* short RF paths;
* switching-noise isolation;
* ESD protection where appropriate;
* clearly identified connectors and test points.
A **4-layer PCB is preferred** when justified by the RF architecture.
Components shall be commercially available, documented, non-obsolete, and suitable for repeatable manufacturing.
---
## 11. REQUIRED TEST POINTS
The PCB shall provide, at minimum:
**TP_RF** – RF input
**TP_BASEBAND** – NFM demodulated signal
**TP_AFSK** – conditioned AFSK signal
**TP_DATA** – digital demodulated output
**GND** – measurement reference
Preferably:
**TP_RSSI** – received signal level
Test points shall not significantly affect circuit performance.
---
## 12. VALIDATION REQUIREMENTS
The contractor shall experimentally demonstrate:
1. Correct reception at **162.425 MHz**.
2. Stable NFM demodulation.
3. Correct baseband recovery.
4. Preservation/detection of **1562.5 Hz and 2083.3 Hz**.
5. Reliable AFSK/FSK demodulation.
6. Stable digital DATA_OUT.
7. Correct operation at approximately **520.83 bit/s**.
8. Data integrity sufficient for subsequent SAME decoding.
9. Stable continuous operation.
10. Adequate rejection of unwanted RF signals.
Testing shall include both actual over-the-air reception and, when appropriate equipment is available, controlled RF signal-generator testing.
---
## 13. RF GENERATOR TEST
The design shall be testable using the following nominal conditions:
* **Carrier:** 162.425 MHz
* **RF modulation:** NFM
* **Data modulation:** AFSK/FSK
* **MARK:** 2083.3 Hz
* **SPACE:** 1562.5 Hz
* **Data rate:** 520.83 bit/s
RF input power shall be progressively reduced to characterize practical receiver sensitivity.
Where suitable equipment is available, performance should be evaluated using **Bit Error Rate (BER)**.
Recommended target:
**BER ≤ 1 × 10⁻³ at the specified minimum RF input level.**
---
## 14. ACCEPTANCE CRITERIA
The module shall be considered compliant when a valid RF signal at **162.425 MHz**, containing SAME-compatible AFSK data, produces the corresponding digital data at **DATA_OUT** reliably and repeatedly.
The output shall have sufficient integrity for an external microcontroller to implement the SAME decoder without requiring modification of the RF receiver or AFSK demodulation hardware.
The following alone shall **not** constitute project acceptance:
* carrier reception;
* RSSI detection;
* audible reception;
* audio/baseband output.
**Reliable recovery of the AFSK/FSK digital data is mandatory.**
---
## 15. REQUIRED DELIVERABLES
The contractor shall provide:
1. Complete electronic schematic.
2. Editable PCB design files.
3. Gerber files.
4. Complete BOM with manufacturer and part number.
5. Pick-and-place and assembly files.
6. Datasheets for critical components.
7. Description and justification of the RF architecture.
8. Description of the AFSK/FSK demodulation method.
9. Interface and signal documentation.
10. Receiver configuration/programming procedure.
11. Complete source code if MCU/DSP/FPGA processing is used.
12. Test and validation procedure.
13. Validation results, including relevant oscilloscope captures.
14. At least one fully assembled and functional prototype.
All project-specific schematic, PCB, firmware, and programmable-device source files shall be delivered in their **original editable formats**.
---
## 16. FINAL EXPECTED RESULT
The completed hardware shall provide the following validated signal chain:
**162.425 MHz RF**
↓
**VHF Receiver**
↓
**NFM Demodulation**
↓
**Baseband Recovery**
↓
**AFSK Signal Conditioning**
↓
**AFSK/FSK Demodulation**
↓
**Digital DATA_OUT – 520.83 bit/s**
↓
**READY FOR SAME DECODER IMPLEMENTATION**
The final product of this engineering stage shall therefore be a **functional VHF RF and physical-layer receiver subsystem**, not merely an audio receiver.
The design shall prioritize **RF sensitivity, frequency stability, interference rejection, data integrity, testability, and manufacturing repeatability** to ensure that the next development stage can implement the SAME protocol decoder directly from the provided DATA_OUT signal.
## VHF SAME Receiver and AFSK/FSK Demodulator
**Document:** RT-RF-SAME-001
**Revision:** 1.1
**Application:** EAS-SAME/SASMEX Signal Receiver
**Target Frequency:** 162.425 MHz
**Operating Band:** 162.400–162.550 MHz
---
## 1. OBJECTIVE
Design and develop an electronic module capable of receiving the VHF signal at **162.425 MHz**, demodulating the NFM transmission, recovering the baseband signal, and demodulating the **AFSK/FSK data used by SAME (Specific Area Message Encoding)**.
The module shall cover the complete signal chain:
**Antenna/RF Input → RF Filtering → VHF Receiver → NFM Demodulation → Baseband Conditioning → AFSK/FSK Demodulation → Digital DATA_OUT**
The final output shall be ready for connection to an external microcontroller that will implement the SAME protocol decoder.
Implementation of the complete SAME message parser and earthquake alert logic is outside the scope of this development.
---
## 2. RF REQUIREMENTS
### 2.1 Frequency
Primary operating frequency:
**162.425 MHz**
The design should preferably support software/configuration-based tuning across:
**162.400–162.550 MHz**
without PCB or component changes.
### 2.2 RF Input
* Nominal impedance: **50 Ω**
* External antenna connection: preferably **SMA**
* Antenna suitable for approximately 162 MHz
* RF layout shall follow appropriate controlled-impedance and grounding practices.
### 2.3 Modulation
The receiver shall support the **Narrowband FM (NFM)** transmission carrying the SAME AFSK data.
The NFM demodulator shall provide a baseband signal with sufficient fidelity for subsequent digital data recovery.
### 2.4 Sensitivity
Required design target:
**≤ –110 dBm**
Preferred target:
**≤ –115 dBm**
The final sensitivity shall be experimentally characterized based on successful digital data recovery, not audible reception only.
### 2.5 Selectivity and Stability
The receiver shall provide sufficient selectivity to reject adjacent/out-of-channel VHF signals.
A crystal, TCXO, PLL, or equivalent stable frequency reference shall be used to maintain reliable tuning during continuous operation.
The designer shall specify the achieved frequency accuracy and stability.
---
## 3. RECEIVER ARCHITECTURE
The designer may select an appropriate architecture, including:
* integrated VHF receiver;
* superheterodyne;
* low-IF;
* direct conversion;
* RF transceiver configured for receive operation;
* equivalent solution.
The selected solution shall prioritize:
* sensitivity;
* selectivity;
* frequency stability;
* component availability;
* manufacturing repeatability;
* long-term availability.
The receiver should preferably provide **RSSI (Received Signal Strength Indicator)** through an analog or digital interface.
---
## 4. BASEBAND REQUIREMENTS
The NFM demodulated output shall preserve the AFSK frequencies used by SAME:
**MARK: 2083.3 Hz**
**SPACE: 1562.5 Hz**
**Nominal data rate: 520.83 bit/s**
The baseband signal shall not be excessively modified by audio processing, filtering, deemphasis, AGC, or other functions that could affect reliable data recovery.
A test point identified as **TP_BASEBAND** shall be provided.
---
## 5. AFSK SIGNAL CONDITIONING
The baseband signal shall be filtered and conditioned for reliable discrimination of the MARK and SPACE frequencies.
As a design reference, the signal-processing chain should preserve approximately:
**1.2 kHz to 2.5 kHz**
with minimal distortion at 1562.5 Hz and 2083.3 Hz.
Filtering may be implemented using:
* analog active/passive filters;
* digital filters;
* DSP;
* or a combination of these methods.
The selected implementation shall be documented.
---
## 6. AFSK/FSK DEMODULATION
The module shall reliably distinguish:
**MARK = 2083.3 Hz**
and
**SPACE = 1562.5 Hz**
at approximately:
**520.83 bit/s**
The demodulation method may use a PLL, frequency discriminator, Goertzel algorithm, DSP, MCU, dedicated modem IC, FPGA, or another technically justified method.
The demodulator shall provide a digital output representing the recovered MARK/SPACE data.
---
## 7. DIGITAL OUTPUT AND MCU INTERFACE
The primary output shall be:
**DATA_OUT**
Preferred electrical level:
**3.3 V logic**
The output shall preserve sufficient timing and data integrity for an external MCU to subsequently perform:
**DATA_OUT → Bit Recovery → Byte Recovery → SAME Message Decoding**
The receiver shall therefore be ready for future detection of SAME messages such as:
`ZCZC-ORG-EEE-PSSCCC+TTTT-JJJHHMM-LLLLLLLL-`
The module should also provide, when supported:
* RSSI
* CARRIER_DETECT
* ENABLE
* RESET
* SPI/I²C/UART for receiver configuration
The designer shall document all interface voltage levels, timing, signal direction, and configuration requirements.
---
## 8. CARRIER DETECTION AND FALSE ACTIVATION
A **CARRIER_DETECT** output is preferred.
Carrier detection, RSSI, or the presence of audio shall **not** be considered a valid alert.
The complete future validation chain shall be:
**RF Carrier → Valid AFSK → Valid Data → Valid SAME Message → Valid Event → Alert**
The current project scope ends at reliable AFSK/FSK digital data recovery.
---
## 9. POWER SUPPLY
Preferred module input:
**5 VDC**
Local regulators may generate 3.3 V, 1.8 V, or other required voltages.
The designer shall specify:
* nominal current consumption;
* maximum current consumption;
* operating voltage tolerance.
Power filtering and decoupling shall prevent digital or switching noise from degrading RF sensitivity.
The receiver shall be suitable for continuous **24/7 operation**.
---
## 10. PCB REQUIREMENTS
The PCB shall follow appropriate RF design practices, including:
* solid/continuous ground plane;
* RF and digital section separation;
* controlled RF routing where required;
* proper IC decoupling;
* short RF paths;
* switching-noise isolation;
* ESD protection where appropriate;
* clearly identified connectors and test points.
A **4-layer PCB is preferred** when justified by the RF architecture.
Components shall be commercially available, documented, non-obsolete, and suitable for repeatable manufacturing.
---
## 11. REQUIRED TEST POINTS
The PCB shall provide, at minimum:
**TP_RF** – RF input
**TP_BASEBAND** – NFM demodulated signal
**TP_AFSK** – conditioned AFSK signal
**TP_DATA** – digital demodulated output
**GND** – measurement reference
Preferably:
**TP_RSSI** – received signal level
Test points shall not significantly affect circuit performance.
---
## 12. VALIDATION REQUIREMENTS
The contractor shall experimentally demonstrate:
1. Correct reception at **162.425 MHz**.
2. Stable NFM demodulation.
3. Correct baseband recovery.
4. Preservation/detection of **1562.5 Hz and 2083.3 Hz**.
5. Reliable AFSK/FSK demodulation.
6. Stable digital DATA_OUT.
7. Correct operation at approximately **520.83 bit/s**.
8. Data integrity sufficient for subsequent SAME decoding.
9. Stable continuous operation.
10. Adequate rejection of unwanted RF signals.
Testing shall include both actual over-the-air reception and, when appropriate equipment is available, controlled RF signal-generator testing.
---
## 13. RF GENERATOR TEST
The design shall be testable using the following nominal conditions:
* **Carrier:** 162.425 MHz
* **RF modulation:** NFM
* **Data modulation:** AFSK/FSK
* **MARK:** 2083.3 Hz
* **SPACE:** 1562.5 Hz
* **Data rate:** 520.83 bit/s
RF input power shall be progressively reduced to characterize practical receiver sensitivity.
Where suitable equipment is available, performance should be evaluated using **Bit Error Rate (BER)**.
Recommended target:
**BER ≤ 1 × 10⁻³ at the specified minimum RF input level.**
---
## 14. ACCEPTANCE CRITERIA
The module shall be considered compliant when a valid RF signal at **162.425 MHz**, containing SAME-compatible AFSK data, produces the corresponding digital data at **DATA_OUT** reliably and repeatedly.
The output shall have sufficient integrity for an external microcontroller to implement the SAME decoder without requiring modification of the RF receiver or AFSK demodulation hardware.
The following alone shall **not** constitute project acceptance:
* carrier reception;
* RSSI detection;
* audible reception;
* audio/baseband output.
**Reliable recovery of the AFSK/FSK digital data is mandatory.**
---
## 15. REQUIRED DELIVERABLES
The contractor shall provide:
1. Complete electronic schematic.
2. Editable PCB design files.
3. Gerber files.
4. Complete BOM with manufacturer and part number.
5. Pick-and-place and assembly files.
6. Datasheets for critical components.
7. Description and justification of the RF architecture.
8. Description of the AFSK/FSK demodulation method.
9. Interface and signal documentation.
10. Receiver configuration/programming procedure.
11. Complete source code if MCU/DSP/FPGA processing is used.
12. Test and validation procedure.
13. Validation results, including relevant oscilloscope captures.
14. At least one fully assembled and functional prototype.
All project-specific schematic, PCB, firmware, and programmable-device source files shall be delivered in their **original editable formats**.
---
## 16. FINAL EXPECTED RESULT
The completed hardware shall provide the following validated signal chain:
**162.425 MHz RF**
↓
**VHF Receiver**
↓
**NFM Demodulation**
↓
**Baseband Recovery**
↓
**AFSK Signal Conditioning**
↓
**AFSK/FSK Demodulation**
↓
**Digital DATA_OUT – 520.83 bit/s**
↓
**READY FOR SAME DECODER IMPLEMENTATION**
The final product of this engineering stage shall therefore be a **functional VHF RF and physical-layer receiver subsystem**, not merely an audio receiver.
The design shall prioritize **RF sensitivity, frequency stability, interference rejection, data integrity, testability, and manufacturing repeatability** to ensure that the next development stage can implement the SAME protocol decoder directly from the provided DATA_OUT signal.
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