PCB Defect Detection Using FPGA

Project Title: FPGA-Based Real-Time PCB Defect Detection and Localization

Project Description:

I am looking for an experienced freelancer to assist with the development of my ECE final-year major project, titled “FPGA-Based Real-Time PCB Defect Detection and Localization.”

The objective is to develop an FPGA-based system that detects and identifies the locations of visible defects on printed circuit boards (PCBs). The proposed system should compare a reference PCB image with a test PCB image and use image-processing techniques to detect differences that indicate potential defects.

Required Features:

1. PCB image acquisition or loading of sample PCB images.
2. Image preprocessing, including grayscale conversion and thresholding where appropriate.
3. Reference and test image comparison using an image-subtraction or other suitable method.
4. Detection of visible PCB fabrication defects, such as broken tracks, damaged pads, or other selected abnormalities.
5. Defect localization by marking the affected regions or providing their coordinates.
6. FPGA implementation of the core image-comparison and defect-detection algorithm using Verilog HDL.
7. Simulation, functional verification, and FPGA synthesis.
8. Real-time or near-real-time operation, depending on the selected hardware and achievable processing performance.
9. Testing with sample PCB images and demonstration of the detected and localized defects.

Expected Deliverables:

* Complete Verilog HDL source code and testbenches.
* FPGA synthesis and implementation files.
* Simulation waveforms and verification results.
* Hardware demonstration on a suitable FPGA development board, as agreed.
* MATLAB or Python code for preprocessing, test-image preparation, or result visualization, if required.
* System block diagram, flowchart, project report, and presentation.
* Setup instructions and an explanation of the implementation for the final-year project evaluation.

Please propose the implementation methodology, suitable FPGA hardware, expected performance, defect types supported, development timeline, and a detailed list of deliverables.

The core defect-detection processing must run on the FPGA. A solution that performs all detection in Python or MATLAB and only displays the result on an FPGA will not meet the project requirements.