Low-Power LoRaWAN Wearable Hardware Design

TITLE:
Hardware design for low-power LoRaWAN device (STM32WL, 915 MHz, KiCad)

DESCRIPTION:
I'm developing a low-power LoRaWAN wearable device and I'm looking for an experienced electronics engineer to handle the complete hardware design. I handle firmware, backend and field testing myself.

Scope:
- Schematic and PCB layout in KiCad (likely 4 layers)
- 915 MHz RF design around an STM32WL (integrated LoRa), with external antenna
- GPS module and a few I2C sensors
- Ultra-low-power design on a primary (non-rechargeable) cell, with switchable power domains
- A high-voltage pulse output stage with a hardware-level fail-safe
- Manufacturing-ready files for JLCPCB SMT assembly: Gerbers, BOM with LCSC part numbers, pick & place, assembly drawings
- Short design rationale document explaining key decisions
- Support during bring-up of the first prototypes

Requirements:
- Proven experience with sub-GHz RF layout (LoRa or similar), with examples you can share
- Experience with ultra-low-power battery devices
- Experience with high-voltage circuits is a strong plus
- Fluent in KiCad
- Good communication in English or Spanish

A detailed specification will be shared with shortlisted candidates after signing an NDA.

In your bid, please include:
1. 1-2 similar projects you've done (sub-GHz RF, low power, HV)
2. Estimated price and timeline, ideally split by milestone (schematic → layout → final files)
3. How many revision rounds are included
4. What kind of support you offer if the first prototypes have design errors

Please start your bid with the word "LoRa" so I know you read the full post. Generic copy-paste bids will be ignored.